Daily news (as I can remember it):

CSC #1 had poor efficiency in layers 1 and 6.  Jay Hauser et
al. notice last night that the pion beam was aimed at a button !
Chamber was moved, and layer 6 comes back. Layer 1 was ultimately
traced to pin problems on the HV connector. It is now fixed, and layer
1 performance is better. Starts with run 5085.

Several runs (5068-5084) were taken to scan ALCT delay settings.  Jay
H. tells us there is an optimal setting that should also put the two
chambers with LCTs in the same bx.  So far one csc is 1 more BX away
from L1A than the other.

MPC->SP FIFO tests in TF crate and in PC->TF crate pass.

TMB->MPC->SP FIFO test also passes.

Now working on getting DAQ FIFO aligned in SP.

By the way, TTCRq boards were obtained. If we can get some stand-off
connectors, we should try them on CCB and make sure system still works
(it should, that's the claim!). Also, maybe we can try using the QPLL
clock instead of Lev's patch to see if that works for the optical
receiver links.

Negotiations with TOTEM will allow us muon beam 08:00-14:00 tomorrow.
Hopefully we get SP ready by then!

Greg P. finds that there is a bad trace on the PC backplane between
TMB to MPC, when TMB is in slot 16 (csc is 8).  We are now putting it
in slot 18 (csc id 9).  The bad trace means one of the alct wg bits is
stuck at 0. This affected the May/June beam test data as well.

Actually, we can't get slot 18 to work, so Mike M. solders wire on
backplane to fix trace.