From hauser@physics.ucla.edu Sun Jun 6 12:36:36 2004 Date: Fri, 7 Nov 2003 11:48:32 -0800 (PST) From: Jay Hauser To: Darin Acosta , drozdetski@phys.ufl.edu Cc: Jay Hauser Subject: TMB quality bit assignment (fwd) Here is the info... ---------- Forwarded message ---------- Date: Mon, 25 Nov 2002 14:57:44 -0800 (PST) From: Jay Hauser To: Darin Acosta , B. Paul Padley , Robert Cousins , Cc: Jay Hauser Subject: TMB quality bit assignment Dear colleagues, you may have been curious at some point as to how the TMB assigns the 4 quality bits that are sent to the MPC and used for sorting. This is what we are now planning: QUAL Description ---- ------------------------------------------ 1111 (ALCT & CLCT half-strip), 12 layers 1110 (ALCT & CLCT half-strip), 11 layers 1101 (ALCT & CLCT half-strip), 10 layers 1100 (ALCT & CLCT half-strip), 9 layers 1011 (ALCT & CLCT half-strip), <=8 layers 1010 (ALCT & CLCT di-strip), 12 layers 1001 (ALCT & CLCT di-strip), 11 layers 1000 (ALCT & CLCT di-strip), 10 layers 0111 (ALCT & CLCT di-strip), 9 layers 0110 (ALCT & CLCT di-strip), <=8 layers 0101 (!ALCT & CLCT half-strip), (any # layers) 0100 (!ALCT & CLCT di-strip), (any # layers) 0011 (ALCT & !CLCT), (any # layers) 0010 (ALCT-accel & CLCT), (any # layers) 0001 (ALCT-accel & !CLCT), (any # layers) 0000 Reserved N.B. "12 layers" means 6 each from cathode and anode. At some point this table should get propagated into the simulation, however, perhaps we should let this information sink in first. Any comments? regards -Jay